Información de la conferencia
ISLPED 2024: International Symposium on Low Power Electronics and Design
https://www.islped.org/2024/Día de Entrega: |
2024-03-04 |
Fecha de Notificación: |
2024-05-20 |
Fecha de Conferencia: |
2024-08-05 |
Ubicación: |
Newport Beach, California, USA |
Años: |
24 |
CCF: c QUALIS: a1 Vistas: 30871 Seguidores: 29 Asistentes: 3
Solicitud de Artículos
The International Symposium on Low Power Electronics and Design (ISLPED) is the premier forum for presentation of innovative research in all aspects of low power electronics and design, ranging from process technologies and analog/digital circuits, simulation and synthesis tools, AI/ML-enhanced EDA/CAD, system-level design, and optimization, to system software and applications. Specific topics include, but are not limited to, the following three main tracks and sub-areas: 1. Technology, Circuits, and Architecture 2. EDA, Systems, and Software 1.1. Technologies Low-power technologies for device, interconnect, logic, memory, 2.5/3D, cooling, harvesting, sensors, optical, printable, biomedical, battery, and alternative energy storage devices and technology enablers for non-Boolean and quantum/quantum-inspired compute models. 1.2. Circuits Low-power circuits for logic, memory, reliability, yield, clocking, resiliency; low-power analog/mixed-signal circuits for wireless, RF, MEMS, ADC/DAC, I/O, PLLs/DLLs, DC-DC converters; energy-efficient circuits for emerging applications (e.g., neuromorphic, biomedical, in-vitro sensing, autonomous); circuits using emerging technologies; cryogenic circuits. DTCO for low power; combinatorial optimizers (Ising machine). 1.3. Logic and Architecture Low-power logic and microarchitecture for SoC designs, processor cores (compute, graphics, and other special purpose cores), cache, memory, arithmetic/signal processing, cryptography, variability, asynchronous design, and non-conventional computing. System technology co-optimization (STCO) for low power. 2.1. CAD Tools and Methodologies CAD tools, methodologies, and AI/ML-based approaches for low-power and thermal-aware design (analog/digital). AI/ML for acceleration of circuit simulation and IP block design convergence. Power estimation, optimization, reliability, and variation impact on power optimization at all levels of design abstraction: physical, circuit, gate, register transfer, behavior, and algorithm. 2.2. Systems and Platforms Low-power, power-aware, and thermal-aware system design including data centers, SoCs, embedded systems, Internet-of-Things (IoT), wearable computing, body-area networks, wireless sensor networks, and system-level power implications due to reliability and variability. Applications of AI/ML-based solutions and brain-inspired computing to power-aware system and platform design. 2.3. Software and Applications Energy-efficient, energy/thermal-aware software and application design, including scheduling and management, power optimization through HW/SW co-design, and emerging low-power AI/ML applications. 3. Crosscutting Topics 3.1. AI/ML Hardware, Compute-in-Memory (CIM) and Next-Generation Computing Low-power AI/ML HW techniques including approximations, application driven optimizations, in-memory/near-memory/energy-efficient accelerations, and neuromorphic computing; energy-efficient HW and systems for generative AI applications (LLMs, diffusion models); energy-efficient AI/ML HW using emerging technologies (including quantum computing); analog/mixed-signal computing. 3.2. Hardware and System Security Low-power hardware security primitives (PUF, TRNG, cryptographic/post-quantum cryptographic accelerators), nano-electronics security, supply chain security, IoT security and AI/ML security; confidential computing; energy-efficient approaches to system security. 4. Industrial Design Track This track solicits papers to reinforce interaction between the academic research community and industry. Industrial Design track papers have the same submission deadline as regular papers and should focus on similar topics but are expected to provide a complementary perspective to academic research by focusing on challenges, solutions, and lessons learnt while implementing industrial-scale designs.
Última Actualización Por Dou Sun en 2024-01-20
Los Mejores Artículos
Año | Los Mejores Artículos |
---|---|
2006 | Analysis of super cut-off transistors for ultralow power digital logic circuits |
2005 | FinFET-based SRAM design |
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